The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device, and more particularly, a technique suitable for use in a method for manufacturing a semiconductor device and a semiconductor device, for example, including a solid-state imaging element.
Complementary metal oxide semiconductor (CMOS) image sensors using the CMOS have been developed as the solid-state imaging element. A CMOS image sensor includes a plurality of pixels, each pixel including a photodiode and a transfer transistor. The photodiode and the transfer transistor are formed in a pixel region of a semiconductor substrate. On the other hand, a transistor serving as a logic circuit, namely, a logic transistor is formed in a peripheral circuit region of the semiconductor substrate.
Japanese Unexamined Patent Application Publication No. 2008-124310 (Patent Document 1) describes a technique for a solid-state imaging device that includes a peripheral circuit region with a silicide layer formed over a semiconductor substrate, and a pixel region without having a silicide layer. The pixel region has a region that is covered with three-layered insulating films and serves to block invasion of a high melting point metal in forming the silicide layer.